@floofloof@lemmy.ca to Linux@lemmy.mlEnglish • 1 year agoDebian Linux is Joining The RISC-V Bandwagonwww.howtogeek.comexternal-linkmessage-square38fedilinkarrow-up1367arrow-down16cross-posted to: technology@lemmy.world
arrow-up1361arrow-down1external-linkDebian Linux is Joining The RISC-V Bandwagonwww.howtogeek.com@floofloof@lemmy.ca to Linux@lemmy.mlEnglish • 1 year agomessage-square38fedilinkcross-posted to: technology@lemmy.world
minus-square@Cevedale@feddit.delinkfedilink1•edit-21 year agoYes and no. AFAIK when coding assembler for these chips you use CISC-instructions but they get translated into RISC-instructions by a hardcoded mikroprocessing-unit (not sure about the real term). So the processor itself gets RISC-instructions.
minus-squareBiblbroxlinkfedilink1•1 year agoIn reality it seems to be more complicated: https://fanael.github.io/is-x86-risc-internally.html
Yes and no. AFAIK when coding assembler for these chips you use CISC-instructions but they get translated into RISC-instructions by a hardcoded mikroprocessing-unit (not sure about the real term). So the processor itself gets RISC-instructions.
In reality it seems to be more complicated: https://fanael.github.io/is-x86-risc-internally.html